specman jobs
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Featured Job Postings from the Web
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| May 02 | Engineer, Senior Design | Marvell Technology Group | Santa Clara, CA |
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Must familar with OOP methodology, preferred to have experience on Vera, specman, systemVerilog, or C++. 5 years +... more |
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| Apr 25 | Engineer, Staff Verification Engineer | Marvell Technology Group | Santa Clara, CA |
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Specman or object oriented approach to the test bench development- Programming skills scripting skills with 4+ years of... more |
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| Apr 22 | ASIC Engineer | Seagate | Shakopee, MN |
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random verification tools such as Vera or Specman. Become part of a team that produces state-of-the-art products and will keep you excited about your work. Work in a team... more |
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| Apr 22 | ASIC Engineer | Seagate Technology | Prior Lake, MN |
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random verification tools such as Vera or Specman. ? Become part of a team that produces state-of-the-art products and will keep you excited about your work.? Work in a team... more |
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| Apr 02 | Staff Logic Design Engineer | Marvell Technology Group | Santa Clara, CA |
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verification language (SystemVerilog, Vera, Specman). 4. Solid understanding of object-oriented programming. 5. Experience with constrained random stimulus generation and advanced... more |
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| Apr 02 | ASIC Verification Engineer - Ready to Hire NOW! | FPC (Fortune Personnel Consultants) | Maine |
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test specifications Proficiency in Cadence Specman is a must ? Proficiency with Synopsys Vera, Verilog and/or VHDL is a requirement ? System Verilog is a plus The ability to lead... more |
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| Apr 02 | ASIC Verification Engineer - Ready to Hire NOW! | FPC (Fortune Personnel Consultants) | Rhode Island |
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test specifications Proficiency in Cadence Specman is a must ? Proficiency with Synopsys Vera, Verilog and/or VHDL is a requirement ? System Verilog is a plus The ability to lead... more |
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| Apr 02 | ASIC Verification Engineer - Ready to Hire NOW! | FPC (Fortune Personnel Consultants) | Massachusetts |
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test specifications Proficiency in Cadence Specman is a must ? Proficiency with Synopsys Vera, Verilog and/or VHDL is a requirement ? System Verilog is a plus The ability to lead... more |
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| Apr 02 | ASIC Verification Engineer - Ready to Hire NOW! | FPC (Fortune Personnel Consultants) | New Hampshire |
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test specifications Proficiency in Cadence Specman is a must ? Proficiency with Synopsys Vera, Verilog and/or VHDL is a requirement ? System Verilog is a plus The ability to lead... more |
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| Apr 02 | ASIC Verification Engineer - Ready to Hire NOW! | FPC (Fortune Personnel Consultants) | Vermont |
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test specifications Proficiency in Cadence Specman is a must ? Proficiency with Synopsys Vera, Verilog and/or VHDL is a requirement ? System Verilog is a plus The ability to lead... more |
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| Mar 14 | Principal ASIC Verification Engineer | Top Echelon Network | Marlborough, MA |
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specifications ??? Proficiency in Cadence Specman, System Verilog, Synopsys Vera, Verilog and/or VHDL is a requirement ??? Ability to lead a small verification team, and work... more |
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| Jan 14 | STUDENT INTERN - Hardware Engineering | Sun Microsystems | Austin, TX |
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of testbench languages such as vera or specman highly desireable.* Strong documentation and writing skillsYEARS OF EXPERIENCE:0-1MINIMUM LEVEL OF EDUCATION:BSFIELD OF STUDY:EE,... more |
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More Job Postings from the Web
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| May 10 | Specman or Vera | Searchtech Solutions (stecs) | San Jose, CA |
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chip verification at 65nm SOC design with Vera / Specman Unix / C++ 5 years... more |
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| May 09 | Verification Engineer | Total Technical Services Houston Office | Dallas, TX |
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responsibilities Must be well-versed in Specman E and Specman sequences. Knowledge of SystemVerilog a plus. DV will utilize supplied C++ / SystemC reference models. Thus knowledge... more |
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| May 09 | HVL Verification Engineer | Advanced Engineering Resources | Sunnyvale, CA |
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perl, C- experience with HVLS such as specman, system verilog/vera Specifically, ... You must have done standardized testbench development; in Specman, this involves... more |
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| May 09 | Engineer, Senior Design | Marvell | Santa Clara, CA |
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preferred to have experience on Vera, specman, systemVerilog, or C++.br /Country: United Statesbr /State: Californiabr /City: Santa Clarabr /br /a... more |
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| May 09 | Engineer, Senior Design | Marvell Semiconductor | Santa Clara, CA |
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preferred to have experience on Vera, specman, systemVerilog, or C++. Qualifications:5 years + MSEE/CS Apply Only at : Marvell... more |
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| May 09 | ASIC Verification Engineer | Koa Networks | San Jose, CA |
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verification ? +2 years experience with Specman or System Verilog Constrained Random test-bench knowledge ? +1 year experience with Assertion-Based Verification (SVA, PSL, OVL) ?... more |
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| May 09 | STUDENT INTERN - Hardware Engineering | Sun Microsystems | Austin, TX |
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of testbench languages such as vera or specman highly desireable.* Strong documentation and writing skillsYEARS OF EXPERIENCE:0-1MINIMUM LEVEL OF EDUCATION:BSFIELD OF STUDY:EE,... more |
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| May 09 | Verification Manager | Terran Systems | Santa Clara, CA |
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We would prefer some one with an E (Specman) background but are open to other verification language/environment backgrounds (i.e. System Verilog, SystemC, Vera, etc). Mixed Signal... more |
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| May 09 | Engineer, Staff Verification Engineer | Marvell Semiconductor | Santa Clara, CA |
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Specman or object oriented approach to the test bench development- Programming skills scripting skills with 4+ years of experienceApply Only at : Marvell... more |
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| May 08 | Verification Engineer | Inmata Solutions | San Jose, CA |
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experience with RTL verification with Specman or Vera is desirable;- Good Knowledge of CPU architecture, SOC bus (AXI/AHB/APB), Video signal processing, and Video interface... more |
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| May 08 | Contract Verification Engineer | Correct Designs | Austin, TX |
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openings for engineers with some or all of the following skills: -Verification ... -Verification -Microprocessor experience -Specman/e Dallas TX Correct Designs has... more |
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| May 07 | RTL Verification Engineer | eTech Resources | Chandler, AZ |
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RTL simulator. Experience in Specman "e" verification language or Vera. Knowledge of hardware based data protection and error checking/correction schemes. Knowledge of serial... more |
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| May 06 | Verification Product Support Specialist | Mentor Graphics | Tempe, AZ |
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architecture and design, SystemVerilog, Specman/e, Vera and/or PSL and Assertion-Based Verification techniques. ? Experience in constrained, random directed testing, formal... more |
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| May 06 | Verification Product Support Specialist | Mentor Graphics | Arizona |
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architecture and design, SystemVerilog, Specman/e, Vera and/or PSL and Assertion-Based Verification techniques. Experience in constrained, random directed testing, formal... more |
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| May 06 | Product Verification Support Specialist | Mentor Graphics | Tempe, AZ |
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architecture and design, SystemVerilog, Specman/e, Vera and/or PSL and Assertion-Based Verification techniques.** Experience in constrained, random directed testing, formal... more |
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| May 04 | Application Engineer - Verification / 50154383 | Mentor Graphics | Tempe, AZ |
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methodologies/flows OVM, E, Vera, Specman, VMM, RMM). ,oPrior experience working with Mentor Questa, Modelsim, 0-In tools. ,oDesign For Test experience a plus,oStrong... more |
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| May 03 | Engineer, Senior Design | Marvell Technology Group | Santa Clara, CA |
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OOP methodology, preferred to have experience on Vera, specman, systemVerilog, or... more |
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| May 02 | Verification Engineer | Total Technical Service | Dallas, TX |
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Requirements Must be well-versed in Specman E and Specman sequences. Knowledge of SystemVerilog a plus. DV will utilize supplied C / SystemC reference models. Thus knowledge... more |
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| May 02 | Logic Verification | Synapse Design Automation | San Jose, CA |
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Must be an expert with systemverilog, specman etc Must have experience with verification of SATA Experience with verification of standard I/O interfaces like USB2.0, PCI-Express... more |
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| May 02 | CoSimulation Development Engineer | Seagate Technology | Longmont, CO |
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Experience with advanced verification languages (Vera, Specman) is desireable as is experience with hardware/firmware cosimulation. Additional proficiencies should include... more |
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| May 02 | CoSimulation Development Engineer | Seagate Technology | Colorado |
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Experience with advanced verification languages (Vera, Specman) is desireable as is experience with hardware/firmware cosimulation. Additional proficiencies should include... more |
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| May 01 | verification engineer | Silicon Elite | Dallas, TX |
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responsibilities Must be well-versed in Specman E and Specman sequences. Knowledge ... please call Silicon Elite 512 330-0775 Specman, System Verilog, System C,... more |
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| May 01 | Engineer, Senior Design | Marvell | Santa Clara, CA |
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preferred to have experience on Vera, specman, systemVerilog, or C++. Country: United States State: California City: Santa... more |
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| May 01 | Verification Engineer | Total Technical Services | Dallas, TX |
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responsibilities Must be well-versed in Specman E and Specman sequences. Knowledge of SystemVerilog a plus. DV will utilize supplied C++ / SystemC reference models. Thus knowledge... more |
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| May 01 | X86 Verification engineer | IT Logix | Hillsboro, OR |
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silicon verification experience (must have) Specman experience DFX validators pre silicon verification experience DFX implementation/verification experience (can be post silicon... more |
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| May 01 | Verification Engineer | Belcan | Dallas, TX |
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responsibilities * Must be well-versed in Specman E and Specman sequences. * Knowledge of SystemVerilog a plus. * DV will utilize supplied C++ / SystemC reference models. Thus... more |
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| May 01 | Engineer, Staff Verification Engineer | Marvell | Santa Clara, CA |
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Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments and a proven track... more |
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| May 01 | Software Design Engineer | STMicroelectronics | Longmont, CO |
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based object oriented programming language (Specman/e) to create advanced verification ... Specman and Hard disk Controller experience a plus... more |
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| May 01 | ASIC DESIGN AND VERIFICATION ENGINEER | Terran Systems | San Jose, CA |
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verification tools available, such as Vera, Specman, and SystemC?... If you can answer yes to these questions, please contact us Please send a WORD VERSION of your resume to the... more |
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| May 01 | FPGA Simulation Engineer opening | Buxton Consulting | Sunnyvale, CA |
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environment for eitherSystem Verilog or SpecMan is a plus.The candidate should be able to translate the test cases to be run in theLinux based lab environment.Experience with FPGA... more |
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| May 01 | 3 - ASIC Verification Engineers - Senior/intermediate | Intelligent Technology Solutions | San Jose, CA |
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- MSEE or MSCE - 2 years experience with Specman or System Verilog Constrained Random test-bench knowledge (Strongly desired for Senior) - Experience in embedded firmware (C/C++),... more |
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| May 01 | LEAD VERIFICATION ENGINEER | Baytech | Campbell, CA |
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be strong in C, Verilog, Perl and Vera or Specman e Worked with multiple verification development cycles Demonstrate strong understanding of verification methodologies Must have... more |
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| May 01 | Applications Engineer | Netpolarity | Cupertino, CA |
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language such as Synopsys Vera or Verisity Specman-E, Knowledge of System Verilog or SystemC Languages, Knowledge of assertions with OVA or SVA or PSL, Hands on experience with... more |
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| May 01 | FPGA Engineer - PON | Teknovus | Petaluma, CA |
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environments such as System Verilog or Specman Experience with PON technologies, Gigabit Ethernet, SmartBits Background in telecommunications protocols and IEEE standards We... more |
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| Apr 30 | ASIC Verification - Specman | Asicsoft | San Jose, CA |
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(Directed and Constraint Random) using Specman e. Execute test with vManager, code ... 5 years Verification Expert with Specman e Experienced with vManager is... more |
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| Apr 30 | Sr., Principle Microprocessor Design Verification Engineers | Tsl Associates | Austin, TX |
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and test microarchitecture using (Vera, Specman, System verilog or pli) Experience with x86 or PowerPC preferred. Knowledge in verification methodologies from concept to working... more |
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| Apr 30 | LEAD VERIFICATION ENGINEER | Baytech Solutions | Hillsboro, OR |
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be strong in C, Verilog, Perl and Vera or Specman ?e? Worked with multiple verification development cycles Demonstrate strong understanding of verification methodologies Must have... more |
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| Apr 30 | ASIC/SoC Design Engineers: Verification and Synthesis | Tsl Associates | Austin, TX |
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higher level tools such as System Verilog, Specman or Vera . Knowledge of VMM, RVM, assertion:SVA, PSL , ARM or AMBA ASIC/SoC Synthesis Engineers; Must have a minimum of 2 to 10... more |
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| Apr 30 | Staff Logic Design Engineer | Marvell Semiconductor | Santa Clara, CA |
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verification language (SystemVerilog, Vera, Specman). 4. Solid understanding of object-oriented programming. 5. Experience with constrained random stimulus generation and advanced... more |
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| Apr 30 | Senior Verification Engineer | Cswitch | Santa Clara, CA |
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testing, system level verification ? Fluent in Verilog, Vera/Specman, C, C++,... more |
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| Apr 30 | Core Verification Engineer | Denali Software | Sunnyvale, CA |
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test plans System Verilog, Vera, or Specman experience strongly desired Verification experience with design IP coded in Verilog Exposure to synthesis and STA reports and analysis... more |
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| Apr 29 | Verification Engineer | Advanced Engineering Resources | Sunnyvale, CA |
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perl, C - experience with HVLS such as specman, system verilog/vera Specifically, ... You must have done standardized testbench development; in Specman, this involves... more |
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| Apr 28 | Senior Verification Engineer | Maxim Integrated Products | Dallas, TX |
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knowledge of PSL and Verisity Specman, if no experience with SystemVerilog. * Knowledge of random verification strategies. * Must have strong UNIX and programming... more |
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| Apr 28 | Verification Engineer - X86, P5, Pre-Silicon | Volt Services | Oregon |
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experience (can be Post-Silicon also) Specman experience (a bonus ) Since this position is urgent you will be given immediate consideration should your resume meet the job... more |
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| Apr 27 | Staff IC Design | San Jose, CA | |
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preferred.Familiarity with Vera, C++/Specman/SystemC or OOP is highly desirable. Requires 7+ years of direct related experience in ASIC chip level verification.Excellent knowledge... more |
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| Apr 25 | Engineer, Staff Verification Engineer | Marvell | Santa Clara, CA |
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Specman or object oriented approach to the test bench development - Programming skills scripting skills with 4+ years of experience Description: Looking for motivated and... more |
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| Apr 25 | Synapse Design Automation - Senior Verification Engineer | Synapse Design Automation | San Jose, CA |
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be highly proficient with SystemC, Vera or Specman * Ability to write design specs for components and modules in the verification environment (test benches, system models, etc.) *... more |
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| Apr 25 | Emulex - Engineer, Principal ASIC | Emulex | San Jose, CA |
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of the art Verification tools such as Vera, Specman, System Verilog, System c. * Excellent communication skills with the ability to work in a team environment with multi-site... more |
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| Apr 25 | Denali Software - Software Engineer | Denali Software | Sunnyvale, CA |
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Skills: ? Experience in SystemVerilog, Specman, or VERA ? Knowledge of interface protocols Education/Experience: ? Requires BSEE/CS ? 3 years of professional experience in... more |
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| Apr 25 | Verification Engineer | Modicom | Milpitas, CA |
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i.e., SystemVerilog, Vera, TestBuilder, Specman or SystemC. * Worked with multiple standard protocols. OCP, AHB, AXI, PCI. Etc. * Strong programming skills in OOP, C++, SV,... more |
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| Apr 25 | Denali Software - Corporate Applications Engineer | Denali Software | Sunnyvale, CA |
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Strong Plus: ? Working knowledge of VHDL, Specman, Vera, System C ? Knowledge of protocols such as PCI-E, USB, 10 Gig ? Previous experience in direct customer support ? Knowledge... more |
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| Apr 25 | Denali Software - Field Application Engineer | Denali Software | Sunnyvale, CA |
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Strong Plus: ? Working knowledge of VHDL, Specman, Vera, System C ? Knowledge of protocols such as PCI-E, USB, 10 Gig, SATA ? Knowledge of memory interfaces and design issues ?... more |
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| Apr 25 | Denali Software - PCIe Core Verification Engineer | Denali Software | Sunnyvale, CA |
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test plans ? System Verilog, Vera, or Specman experience strongly desired ? Verification experience with design IP coded in Verilog ? Exposure to synthesis and STA reports and... more |
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| Apr 25 | Denali Software - Field Application Engineer | Denali Software | Austin, TX |
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Strong Plus: ? Working knowledge of VHDL, Specman, Vera, System C ? Knowledge of protocols such as PCI-E, USB, 10 Gig, SATA ? Knowledge of memory interfaces and design issues ?... more |
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| Apr 24 | Validation Engineer | Intel | Folsom, CA |
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of industry standard tools such as Specman* and Debussy* would be an added... more |
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| Apr 24 | Hardware Design Engineer (Entry Level) | Hewlett-Packard Company | Roseville, CA |
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verification coding using tools such as Specman E, Test Builder/C/C++, and/or Vera. ... CAD tools and methodologies: Verilog, Specman & E, VisualHDL, Undertow, SignalScan,... more |
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| Apr 24 | Hardware Design Engineer (Entry Level) | Hewlett-Packard | Roseville, CA |
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verification coding using tools such as Specman E, Test Builder/C/C++, and/or Vera. ... etc. CAD tools and methodologies: Verilog, Specman & E, VisualHDL, Undertow,... more |
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| Apr 24 | Sr ASIC Verification Engineer | SanDisk | Milpitas, CA |
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must include functional verifications; Specman-e; test-pan specification development; ARM and USB 1.1 protocol verification; DMA controller module level design verification; DMA... more |
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| Apr 23 | Western Digital - Sr. Staff Engineer, ASIC Design-Verifica | Western Digital | Lake Forest, CA |
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? Prior experience using Vera, Specman or System Verilog ? Knowledgeable in Verilog/Verilog-PLI ? Proficiency with EDA RTL verification tools & script generation ? Previous... more |
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| Apr 23 | Western Digital - Senior Staff Engineer, ASIC Verification | Western Digital | Lake Forest, CA |
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verification ? Prior experience using Vera, Specman or System Verilog ? Knowledgeable in Verilog/Verilog-PLI ? Proficiency with EDA RTL verification tools & script generation ?... more |
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| Apr 23 | Zoran Corporation - ASIC Verification Engineer - Digital | Zoran | Sunnyvale, CA |
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Engineering, or equivalent field. ? Specman or System Verilog Constrained Random test-bench knowledge ? Experience in embedded firmware (C/C ), low level drivers / silicon... more |
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| Apr 23 | Zoran Corporation - ASIC Verification Engineer - Digital | Zoran | Sunnyvale, CA |
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focus ? 2 years experience with Specman or System Verilog Constrained Random test-bench knowledge ? 1 year experience with Assertion-Based Verification (SVA, PSL, OVL) ?... more |
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| Apr 22 | Verification Vera / Specman | Searchtech Solutions | San Jose, CA |
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with Vera / Specman / VerilogUnix / C++5 years experience Verification, Specman, Vera,... more |
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| Apr 22 | Verification Core Competency Technical Leader | Cadence Design Systems | San Jose, CA |
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and Methodology ? Experience with Specman and eRM in a technical leadership role and enthusiasm for Specman-based solutions ? At least one of: ? Experience withVerification... more |
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| Apr 22 | Sr. FPGA Simulation Engineer | Buxton Consulting | Sunnyvale, CA |
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environment for eitherSystem Verilog or SpecMan is a plus.The candidate should be able to translate the test cases to be run in theLinux based lab environment.Experience with FPGA... more |
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| Apr 22 | ASIC Engineer | Seagate Technology | Prior Lake, MN |
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random verification tools such as Vera or Specman. ? Become part of a team that produces state-of-the-art products and will keep you excited about your work.? Work in a team... more |
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| Apr 21 | Engineer, Principal Verification / 08-09286 | Broadcom | California |
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- Strong Verilog/Vhdl, C/C++, Vera/Specman, PERL, TCL programming skills. - SystemC, System Verilog or assertion based verification background a plus. - Strong system and block... more |
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| Apr 19 | AMCC - Principal Design Engineer (Verification) | Amcc | Sunnyvale, CA |
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and implementation,using HVL languages like Specman, Vera or System Verilog for at least ... Special Skills or Knowledge Required: Must be skilled using Specman, Vera or System... more |
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| Apr 19 | RTL Verification Engineer | Spherion | Chandler, AZ |
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Experience in Specman 'e' verification language. Knowledge of serial protocols such as PCI Express, Serial Attached SCSI (SAS) and Serial ATA (SATA) are highly desirable.... more |
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| Apr 19 | RTL Verification Engineer | Spherion | Chandler, AZ |
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Experience in Specman 'e' verification language. Knowledge of serial protocols such as PCI Express, Serial Attached SCSI (SAS) and Serial ATA (SATA) are highly desirable.... more |
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| Apr 19 | Broadcom Corporation - Sr. Design Verification Engineer (Networ | Broadcom | San Jose, CA |
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? Familiarity with Vera, C /Specman/SystemC or OOP is highly desirable.... more |
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| Apr 18 | Verification Engineers | Virident Systems | Milpitas, CA |
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language such as SystemVerilog, Vera, or Specman. ** Familiar with verification reuse ... programming skills SystemVerilog Vera Specman computer architecture PCIe... more |
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| Apr 17 | Principal ASIC Verification Engineer | Marlborough, MA | |
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specifications a Proficiency in Cadence Specman, System Verilog, Synopsys Vera, Verilog and/or VHDL is a requirement a Ability to lead a small verification team, and work... more |
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| Apr 16 | Pre-Si Validation Engineer | Intel | Austin, TX |
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with Verilog* and/or System Verilog*, Specman 'e', Perl or other scripting languages - Knowledge of assertion based languages and/or methodology and C/C++ would be an added... more |
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| Apr 16 | ASIC Verification Engineers | Santa Clara, CA | |
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communications skills - C Skills Preferred- Specman, Vera, SystemC, System Verilog are helpfulvideo, wireless, rf, dtv, wimax, uwb, cellular, broadband, bluetooth, 802, rfid,... more |
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| Apr 16 | Senior FPGA Verification Engineer | Lightfleet | Camas, WA |
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a verification language (SystemC, Vera, or Specman preferred)** Have worked multiple ... Architect, Architecting, SystemC, Vera, Specman, test harness, test cases, PCI,... more |
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| Apr 16 | Senior DFT engineer and ASIC Engineers | Azilon | California |
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-Experience in Verilog, System Verilog or Specman or VERA or C++ based verification -Good knowledge of Protocols like Ethernet, SAS, SATA, PCI Express, AMBA, USB etc. -Scripting... more |
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| Apr 16 | Staff IC Design | Broadcom | San Jose, CA |
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preferred. Familiarity with Vera, C++/Specman/SystemC or OOP is highly... more |
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| Apr 12 | Verification Engineer | LSI LOGIC | Fort Collins, CO |
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approaches using SystemVerilog, SystemC, SpecMan/e, or Vera; and experience writing ... Experience with SystemVerilog, Vera and/or SpecMan/e would be valuable, as well as... more |
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| Apr 12 | Verification/Firmware Engineer | LSI LOGIC | Fort Collins, CO |
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approaches using SystemVerilog, SystemC, SpecMan/e, or Vera; and experience writing ... Experience with SystemVerilog, Vera and/or SpecMan/e would be valuable, as well as... more |
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| Apr 12 | Verification Engineer, Staff | LSI LOGIC | Fremont, CA |
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such as SystemC, SystemVerilog, Vera or Specman, as well as C / C++ programming background This position requires the use of various other support tools for verification... more |
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| Apr 11 | Wireless ASIC Verification Engineer | Pulse~link | Carlsbad, CA |
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RTL * High-Level Verification Languages: Specman e, SystemVerilog * C/C++ * MATLAB and ESL tools * Scripting languages: Shell, Perl, TCL * Manufacturing test vector development *... more |
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| Apr 11 | Verification Engineer, Staff | LSI | Fremont, CA |
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such as SystemC, SystemVerilog, Vera or Specman, as well as C / C++ programming backgroundThis position requires the use of various other support tools for verification including... more |
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| Apr 10 | Senior Verification Engineer (ASIC, Vera, C++) - Corp R& | QUALCOMM | San Diego, CA |
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Must be skilled in Vera (or Specman E / Specman-E), C++/OOP, and have a strong background in data structures and algorithms. ASIC Design experience using industry-standard... more |
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| Apr 10 | Design Verification Engineer - All Levels - Santa Clara Offi | QUALCOMM | Campbell, CA |
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* Strong working knowledge of HVLs: VERA/e-Specman * Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting Additional Skills Education Requirements BS/MS/PhD in Electrical Engineering... more |
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| Apr 09 | ASIC Verification Engineer | Draper Laboratory | Massachusetts |
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Candidate must have experience using high level verification tools - preferably Specman ... 3 years direct experience working with Specman e environment. Must have experience... more |
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| Apr 09 | Verification Engineer | LSI | Fort Collins, CO |
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approaches using SystemVerilog, SystemC, SpecMan/e, or Vera; and experience writing ... Experience with SystemVerilog, Vera and/or SpecMan/e would be valuable, as well as... more |
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| Apr 09 | Verification Engineer | LSI | Colorado |
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approaches using SystemVerilog, SystemC, SpecMan/e, or Vera; and experience writing ... Experience with SystemVerilog, Vera and/or SpecMan/e would be valuable, as well as... more |
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