"System Verilog" or systemverilog jobs
Subscribe to RSS Feed| Posted | Job Title | Company | Location |
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| Mar 20 | Associate Technical Marketing Engineer-DVT / 50212964 | Mentor Graphics | Wilsonville, OR |
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Associate Technical Marketing Engineer-DVT / 50212964 Wilsonville,OR In this position, ... random, assertions). Strong group or customer presentation skills are... more |
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| Mar 20 | Component Design Engineer | Intel | Folsom, CA |
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responsibilities involve logic design using System Verilog, functional logic ... Engineering, Computer Engineering or a related discipline with minimum of 3... more |
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| Mar 20 | Engineer, Senior ASIC Design | Marvell | Santa Clara, CA |
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signal generators, etc Desired * System Verilog and VHDL * Experience with scripting languages such as perl, tcl, etc. * Experience with buses/protocols/standards such as USB,... more |
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| Mar 20 | Engineer, ASIC Design | Marvell | Santa Clara, CA |
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signal generators, etc Desired * System Verilog and VHDL * Experience with scripting languages such as perl, tcl, etc. * Experience with buses/protocols/standards such as USB,... more |
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| Mar 20 | SOC DV Engineer HW Emulation testing | AMD | Boxborough, MA |
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functional issues. REQUIREMENTS -BS degree or MS in EE or Computer Engineering required ... plus 5+ years experience - Verilog and System Verilog - C and C++ programming... more |
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| Mar 20 | Graduate Intern Technical | Intel | Folsom, CA |
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of Science degree in Electrical Engineering or Computer Engineering, with coursework ... Very High System Integration (VLSI) and/or Application Specific Integrated Circuit... more |
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| Mar 19 | Sr. ASIC Verification Engineer | Ironkey | Los Altos, CA |
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makefiles, scripting languages, verilog, system verilog, and linux to build a ... test, and adding instrumentation such as code coverage or functional coverage... more |
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| Mar 19 | RTL Design Engineer | eTech Resources | Hillsboro, OR |
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developing RTL validation environment using System Verilog and OVM methodology. -Strong ... protocols such as PCIeGen1/2/3, USB3 and/or SATA -Good scripting skills in... more |
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| Mar 19 | Hardware/Software Eng. Intern | Intel | Santa Clara, CA |
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Job assignments are usually for the summer or for short periods during breaks from ... Architecture, UNIX, Shell scripting, System Verilog and project experience... more |
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| Mar 19 | Engineer, Principal Design | Broadcom | Austin, TX |
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Verilog and/or higher level languages like System Verilog or System C or Vera. . Write ... formal verification. . Experience in System Verilog or System C or any other... more |
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| Mar 19 | Design Validation Engineer | Intel | Phoenix, AZ |
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in a Masters or PhD program in Electrical or Computer Engineering. Exposure into a ... applications/resumes until 45 days after posting date or earlier at Intels... more |
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| Mar 19 | Engineer, Principal Design | Broadcom | Austin, TX |
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Verilog and/or higher level languages like System Verilog or System C or Vera. Write ... formal verification. Experience in System Verilog or System C or any other... more |
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| Mar 19 | Digital Design Section Head | Raytheon | Goleta, CA |
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Verification experience using Vera or System Verilog -Experience with Component ... age, disability, or Vietnam era, or other eligible veteran status, or any... more |
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| Mar 19 | Sr FPGA Design Engineer | Infinity Technology | Littleton, CO |
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The requirements listed below are representative of the knowledge, skill, and/or ability ... Education and/or Experience: * BS in Electrical Engineering or related field is... more |
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| Mar 19 | Verification Engineer | Sun Microsystems | Santa Clara, CA |
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ownership of a section of the design or full chip verification. Major functions ... with Sparc Assembly language programming,System verilog, Verilog, coverage analysis,... more |
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| Mar 19 | Sr. FPGA Design Engineer | Littleton, CO | |
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The requirements listed below are representative of the knowledge, skill, and/or ability ... Education and/or Experience: • BS in Electrical Engineering or related field is... more |
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| Mar 19 | Sr Analog /Sr ASIC Design Engineer (Multiple Positions) - Enphase Energy | Enphase Energy | California |
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validation (pre-silicon, post-silicon). * System Verilog for verification is a plus. * ... analog circuit design, simulate with HSpice or Spectre for high voltage process. Work... more |
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| Mar 18 | ASIC Verification Engineer | Intel | Austin, TX |
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verilog, Specman, C .Masters in Electrical or Computer Engineering or Masters in ... Science.Masters in Electrical or Computer Engineering or Masters in Computer... more |
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| Mar 18 | Component Design Engineer | Intel | Phoenix, AZ |
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This position is for a Hard IP Digital Design and/or Verification Engineer in the ... components (monitors, BFMs etc.) in System Verilog, BMODs, interfacing with... more |
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| Mar 18 | Engineer, Principal Design | Broadcom | Austin, TX |
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Verilog and/or higher level languages like System Verilog or System C or Vera. . Write ... formal verification. . Experience in System Verilog or System C or any other... more |
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| Mar 18 | Component Design Engineer | Intel | Folsom, CA |
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responsibilities involve logic design using System Verilog, functional logic ... Engineering, Computer Engineering or a related discipline. Additional... more |
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| Mar 18 | Software Engineer | Intel | Hillsboro, OR |
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or Master's degree in Computer Science or Computer Engineering with some experience ... programming skills, proficiency in C and/or C++, familiar with Linux* and/or UNIX*... more |
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| Mar 18 | Component Design Engineer | Intel | Folsom, CA |
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responsibilities involve logic design using System Verilog, functional logic ... applications/resumes until 45 days after posting date or earlier at Intels... more |
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| Mar 18 | 3764 FPGA Programmer - Littleton, CO with Security Clearance | Isys Technologies | Littleton, CO |
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ISYS Technologies is currently hiring a FPGA Programmer to provide labor, services and management necessary to provide the Client with FPGA design support to the Client PDU IPT. more |
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| Mar 18 | Engineer, Principal Design | Broadcom | Austin, TX |
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Verilog and/or higher level languages like System Verilog or System C or Vera. Write ... formal verification. Experience in System Verilog or System C or any other... more |
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| Mar 18 | Staff IC Design Engineer | Atmelchips.com | La Verne, CA | La Verne, CA |
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experience. Knowledge of Synopsis, Cadence or Mentor tool chains for design, ... Experience in VHDL, verilog, system verilog, C, System C, Assembly, Perk, Tcl/Tk... more |
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| Mar 17 | Verification Engineer - ASIC - RTL - SAS - SATA - Verilog - Vera - C/C++ - System Verilog | Cybercoders | Irvine, CA |
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Verification Engineer - ASIC - RTL - SAS - SATA - Verilog - Vera - C/C++ - System Verilog ... Vera, C/C++ , Storage, System C, Vera, System Verilog Job Description Verification... more |
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| Mar 17 | Senior ASIC Verification Engineer - RVM/VMM | Innovative LOGIC | Santa Clara, CA |
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You must be expert in SystemVerilog RVM or VMM Expertise in verilog,System Verilog, RVM, VMM Good experience in perl, C/C++ Expert in directed testing Good knowledge of randamized... more |
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| Mar 17 | Verification Engineer ASIC RTL SAS SATA Verilog Vera | California | |
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Vera, C/C++ , Storage, System C, Vera, System Verilog Verification Engineer - ASIC ... RTL - SAS - SATA - Verilog - Vera - C/C++ - System Verilog - Storage - SSD - HDD -... more |
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| Mar 17 | Component Design Engineer | Intel | Folsom, CA |
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responsibilities involve logic design using System Verilog, functional logic ... Engineering, Computer Engineering or a related discipline. Additional... more |
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| Mar 17 | Software Engineer | Intel | Hillsboro, OR |
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or Master's degree in Computer Science or Computer Engineering with some experience ... programming skills, proficiency in C and/or C , familiar with Linux* and/or UNIX*... more |
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| Mar 17 | Component Design Engineer | Intel | Folsom, CA |
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responsibilities involve logic design using System Verilog, functional logic ... Engineering, Computer Engineering or a related discipline with minimum of 3... more |
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| Mar 17 | Design Automation (DA) Intern | Intel | Hudson, MA |
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Areas of potential engagement include using System Verilog for VLSI design, synthesis, ... applications/resumes until 45 days after posting date or earlier at Intels... more |
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| Mar 17 | Pre-Si Validation Developer | Beaverton, OR | |
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developing RTL validation environment using System Verilog and OVM methodology * Strong ... protocols such as PCIeGen1/2/3, USB3 and/or SATA * Good scripting skills in... more |
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| Mar 17 | Senior Software Engineer (Exempt 4P3) | Stanford University | Stanford, CA |
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successful candidate must have:? BS or MS degree in Electrical Engineering or ... a system solution to a group of users or "customers." ? Expertise in computer and... more |
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| Mar 17 | Digital Design Section Head | Raytheon | Santa Barbara, CA |
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Verification experience using Vera or System Verilog -Experience with Component ... age, disability, or Vietnam era, or other eligible veteran status, or any... more |
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| Mar 17 | Digital Design Section Head | Raytheon | Goleta, CA |
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to enhance product competitiveness and/or add technical competency to organization ... Desired Skills: -Functional Verification experience using Vera or System Verilog... more |
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| Mar 16 | Component Design Engr | Intel | Santa Clara, CA |
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components, performing developmental and/or test work, reviewing product requirements ... Responds to customer/client requests or events as they occur... more |
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| Mar 16 | Design Automation (DA) Intern | Intel | Massachusetts |
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Areas of potential engagement include using System Verilog for VLSI design, synthesis, ... educational qualification and a GPA of 3.0 or higher. Additional qualifications... more |
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| Mar 16 | ASIC Verification Engineer | Intel | Austin, TX |
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: Ethernet, TCP/IP, any protocols running on top of TCP, digital logic simulation, verilog, system verilog, Specman, C . Masters in Electrical or Computer Engineering or Masters... more |
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| Mar 16 | Component Design Engineer | Intel | Phoenix, AZ |
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components (monitors, BFMs and others) in System Verilog*. You will act as a ... Engineering or Computer Engineering or equivalent. Additional qualifications... more |
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| Mar 16 | Graduate Intern Technical | Intel | Austin, TX |
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and area estimation. Candidate pursuing MS or Ph.D. with specialization in DFT is ... Should be comfortable writing and validating RTL code in Verilog/System Verilog... more |
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| Mar 16 | Validation Intern | Intel | Santa Clara, CA |
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components'' performing developmental and/or test work'' reviewing product ... Responds to customer/client requests or events as they occur... more |
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| Mar 16 | Digital Design Section Head | Raytheon | Goleta, CA |
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Verification experience using Vera or System Verilog * Experience with ... age, disability, or Vietnam era, or other eligible veteran status, or any... more |
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| Mar 16 | Engineer, ASIC Design | Marvell | Santa Clara, CA |
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signal generators, etc Desired * System Verilog and VHDL * Experience with scripting languages such as perl, tcl, etc. * Experience with buses/protocols/standards such as USB,... more |
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| Mar 16 | Engineer, Senior Design Verification | Marvell | Santa Clara, CA |
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BS/MS EE, or CE. . 4+ years of design verification experience with advance ... advance verification methodology such as System Verilog, SVA, VMM. . Strong working... more |
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| Mar 16 | Engineer, Senior ASIC Design | Marvell | Santa Clara, CA |
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signal generators, etc Desired * System Verilog and VHDL * Experience with scripting languages such as perl, tcl, etc. * Experience with buses/protocols/standards such as USB,... more |
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| Mar 16 | Hardware Engineer | Intel | Hillsboro, OR |
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Chandler, Arizona; California (Santa Clara or Folsom); Hillsboro, Oregon or Austin, ... Science, Electrical or Computer Engineering or other related engineering discipline and... more |
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| Mar 16 | Hard IP DFX Lead | Intel | Phoenix, AZ |
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least three years of manufacturing, design or architectural experience. Additional ... and Post-Si Debug techniques - Experience with Verilog* and/or System Verilog* is a... more |
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| Mar 16 | Graduate Intern | Intel | Austin, TX |
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Cadence/mentor tool set ? or equivalent). 2. Understand CMOS basic layout and reading schematics. 3. ... Some automatic place/route experiences using (Synopsys or equiv)... more |
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| Mar 16 | Embedded System Engineer Lead | Opticomp | Nevada |
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License, Certification Required: ? B.S. or M.S. Electrical Engineering or related ... information, and resume via email, fax or postal to the following: OptiComp... more |
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| Mar 16 | Embedded System Engineer III | Opticomp | Nevada |
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License, Certification Required: ? B.S. or M.S. Electrical Engineering or related ... information, and resume via email, fax or postal to the following: OptiComp... more |
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| Mar 16 | FPGA Hardware Engineer | Talentfuse | San Diego, CA |
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PlanAhead, Modelsim and XST, Synplicity or Leanardo Spectrum is preferred.* Basic ... Minimum Education requirements: BSEE or BSCS or an equivalent required.Interested... more |
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| Mar 16 | VHDL Programmer | Talentfuse | San Diego, CA |
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PlanAhead, Modelsim and XST, Synplicity or Leanardo Spectrum is preferred.* Basic ... Minimum Education requirements: BSEE or BSCS or an equivalent required.Interested... more |
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| Mar 16 | FPGA Engineer (Contractor) | Curtiss-Wright | San Diego, CA |
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Traffic in Arms Regulations (ITAR) or the Export Administration Regulations ... requirements: BSEE or BSCS or an equivalent required. Curtiss-Wright Controls is... more |
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| Mar 15 | Verification Engineer | Techno Soft | Austin, TX |
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processors Developing test benches in OVM, SystemVerilog and/or C++, applying ... pseudo-random test generators, developing System Verilog/C/assembly tests, analyzing... more |
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| Mar 15 | Component Design Engineer | Intel | Folsom, CA |
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This position is for an IP Digital Design and/or Verification Recent College Graduate ... Engineering or Computer Engineering or equivalent. Additional qualifications... more |
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| Mar 15 | Component Design Engineer | Intel | Phoenix, AZ |
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This position is for an IP Digital Design and/or Verification Recent College Graduate ... Engineering or Computer Engineering or equivalent. Additional qualifications... more |
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| Mar 15 | Component Design Engineer | Intel | Phoenix, AZ |
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A qualified candidate will have a BSEE/MSEE or equivalent and 7-10 years applicable ... using the following techniques/tools: - System Verilog - Synopsys VCS Simulator -... more |
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| Mar 15 | Component Design Engineer | Intel | Phoenix, AZ |
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A qualified candidate will have a BSEE/MSEE or equivalent and 7-10 years applicable ... using the following techniques/tools: - System Verilog - Synopsys VCS Simulator -... more |
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| Mar 15 | Component Design Engineer | Intel | Phoenix, AZ |
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Qualifications A qualified candidate will have a BSEE/MSEE or equivalent and 7-10 years ... using the following techniques/tools: - System Verilog - Synopsys VCS Simulator -... more |
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| Mar 15 | Component Design Engineer | Intel | Sacramento, CA |
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Qualifications A qualified candidate will have a BSEE/MSEE or equivalent and 7-10 years ... using the following techniques/tools: - System Verilog - Synopsys VCS Simulator -... more |
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| Mar 15 | Hardware Engineer | Intel | Phoenix, AZ |
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Chandler, Arizona; California (Santa Clara or Folsom); Hillsboro, Oregon or Austin, ... degree in Computer Science, Electrical or Computer Engineering or other related... more |
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| Mar 15 | Component Design Engineer | Intel | Phoenix, AZ |
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Qualifications A qualified candidate will have a BSEE/MSEE or equivalent and 7-10 years ... using the following techniques/tools: - System Verilog - Synopsys VCS Simulator -... more |
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| Mar 15 | Hardware Engineer | Intel | Hillsboro, OR |
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Chandler, Arizona; California (Santa Clara or Folsom); Hillsboro, Oregon or Austin, ... degree in Computer Science, Electrical or Computer Engineering or other related... more |
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| Mar 15 | Hardware Engineer | Intel | Sacramento, CA |
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Chandler, Arizona; California (Santa Clara or Folsom); Hillsboro, Oregon or Austin, ... degree in Computer Science, Electrical or Computer Engineering or other related... more |
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| Mar 15 | Engineer, Principal Design | Broadcom | Austin, TX |
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Verilog and/or higher level languages like System Verilog or System C or Vera. . Write ... formal verification. . Experience in System Verilog or System C or any other... more |
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| Mar 15 | Component Design Engineer | Intel | Phoenix, AZ |
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You should possess a relevant educational qualification, BSEE/MSEE or equivalent and ~7 ... Must have significant prior knowledge of PCIe, DMI, SATA or SAS I/O design... more |
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| Mar 15 | Sr. Electrical Engineer - ASIC Verificat | Cedar Rapids, IA | |
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Communications, GPS, Cryptography, and/or DSP. Candidate's primary role will be to ... or System Verilog, familiar with VHDL, or Verilog. Candidate must possess a strong... more |
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| Mar 14 | ASIC Engineer | Cisco Systems | San Jose, CA |
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C++ required- knowledge and experience in System Verilog, make, scripting a plusLooking for smart, motivated, team-oriented, problem solver. Desired Attributes Profession:... more |
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| Mar 14 | Engineer, Verification | Marvell | Austin, TX |
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Verification Qualifications: BS/MS in EE or equivalent educational background. ... Valuable skills/experiences desired include: Verilog or VHDL coding, Modelsim or... more |
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| Mar 14 | MTS ASIC DFT/Verification Engineer | AMD | Boxborough, MA |
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DFT/DFX features - Porting or creating the DFT/DFX verification ... coverage with HVL's such as System Verilog or SystemC - Experienced with formal... more |
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| Mar 13 | Principal Engineer | Seagate Technology | Longmont, CO |
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and languages such as Vera, Verilog, System Verilog and C. * Strong Unix/Linux ... verification methodologies such as Vera/RVM or SystemVerilog/VMM. * Knowledge of... more |
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| Mar 13 | Component Design Engineer | Intel | Phoenix, AZ |
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components (monitors, BFMs and others) in System Verilog*. You will act as a ... Engineering or Computer Engineering or equivalent. Additional qualifications... more |
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| Mar 13 | Verification Engineer Customer Palladium Simulation Support | LSI | Longmont, CO |
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test benches Knowledge of Verilog and/or VHDL design languages (System Verilog is ... * 8 years of experience Qualifications: BS or MS in Electrical or Computer Engineering... more |
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| Mar 13 | Verification Engineer - Customer Design Verification Support | LSI | Longmont, CO |
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of Verilog and/or VHDL design languages (System Verilog is a plus) Excellent ... Qualifications: BS or MS in Electrical or Computer Engineering and 2 - 8 years... more |
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| Mar 12 | Staff Logic Design Engineer | Marvell Semiconductor | Santa Clara, CA |
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Experience in building Verification environments using SystemVerilog, VMM/OVM + Past ... environment using Constraint Random, SystemVerilog Assertions+ Strong knowledge... more |
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| Mar 12 | Component Design Engineer | Intel | Santa Clara, CA |
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components, performing developmental and/or test work, reviewing product requirements ... Responds to customer/client requests or events as they occur... more |
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| Mar 12 | ASIC Verification Engineer | Intel | Austin, TX |
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C++. Qualifications Masters in Electrical or Computer Engineering or Masters in ... applications/resumes until 45 days after posting date or earlier at Intels... more |
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| Mar 12 | Validation Intern | Intel | Santa Clara, CA |
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components'' performing developmental and/or test work'' reviewing product ... Responds to customer/client requests or events as they occur... more |
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| Mar 12 | Verification Engineer - SPARC Microprocessors | Sun Microsystems | Santa Clara, CA |
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the test plan with directed (assembly/System Verilog/Vera )diags and random diags, ... in at least one engineering area, field or specialty and working knowledge of... more |
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| Mar 12 | Hardware Engineer | Intel | Hillsboro, OR |
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Chandler, Arizona; California (Santa Clara or Folsom); Hillsboro, Oregon or Austin, ... Science, Electrical or Computer Engineering or other related engineering discipline and... more |
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| Mar 12 | Sr. Verification Engineer | Sun Microsystems | Austin, TX |
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degree in Electrical Engineering and/or Computer Engineering and/or Computer ... coverage analysis - Experience in writing System Verilog for assertions and checkers,... more |
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| Mar 12 | Associate IC Design Engineer | Atmelchips.com | La Verne, CA | La Verne, CA |
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Preferred Skills : N/A Education: Bachelors or Masters degree Experience: Less than 2 ... Experience in VHDL, verilog, system verilog, C, System C, Assembly, Perk, Tcl/Tk... more |
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| Mar 12 | Staff/Principal Design Engineer (DSP/PHY ASIC) | Amcc-applied Micro Circuits | Sunnyvale, CA |
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circuits by bitmatching RTL against Matlab or C-model Optimize design for low power, ... correction decoders such as LDPC, RS, BCH. System Verilog and Matlab experience for... more |
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| Mar 11 | Multiple Positions - Verification Engineers | Eksource Technologies | Austin, TX |
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to): # 3 * 10 years experience with Verilog SystemVerilog, HDL, programming in Perl, ... test benches in OVM, SystemVerilog and/or C++, applying pseudo-random test... more |
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| Mar 11 | Multiple Positions - Verification Engineers | Eksource Technologies | Boxborough, MA |
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to): # 3 * 10 years experience with Verilog SystemVerilog, HDL, programming in Perl, ... test benches in OVM, SystemVerilog and/or C++, applying pseudo-random test... more |
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| Mar 11 | Staff Logic Design Engineer | Marvell Semiconductor | Santa Clara, CA |
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Experience in building Verification environments using SystemVerilog, VMM/OVM + Past ... environment using Constraint Random, SystemVerilog Assertions + Strong knowledge... more |
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| Mar 11 | ASIC Verification Engineer | Intel | Austin, TX |
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: Ethernet, TCP/IP, any protocols running on top of TCP, digital logic simulation, verilog, system verilog, Specman, C . Masters in Electrical or Computer Engineering or Masters... more |
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| Mar 11 | MTS ASIC DFT/Verification Engineer | AMD | Boxborough, MA |
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DFT/DFX features - Porting or creating the DFT/DFX verification ... coverage with HVL's such as System Verilog or SystemC - Experienced with formal... more |
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| Mar 11 | FPGA Hardware Engineer | Talentfuse | San Diego, CA |
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PlanAhead, Modelsim and XST, Synplicity or Leanardo Spectrum is preferred. * Basic ... * Minimum Education requirements: BSEE or BSCS or an equivalent required. more |
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| Mar 10 | Verification Engineer | Infokall | Austin, TX |
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Verification EngineerLocation: Austin, TX or Boxborough, MADuraiton: 9 Months ... test benches in OVM, SystemVerilog and/or C++, applying pseudo-random test... more |
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| Mar 10 | ASIC Verification Engineer | Teknovus | Petaluma, CA |
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System Verilog a plus. * BS EE, CE or CS; or equivalent work experience. * Past experience in verification of processor (ARM/ARC) based SoC designs. * Familiar with GPON, EPON,... more |
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| Mar 10 | ASIC Verification Engineer | Teknovus | Petaluma, CA |
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System Verilog a plus. * BS EE, CE or CS; or equivalent work experience. * Past experience in verification of processor (ARM/ARC) based SoC designs. * Familiar with GPON, EPON,... more |
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| Mar 10 | System Architect | Pano LOGIC | San Francisco, CA |
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Ability to write System C, Verilog, System Verilog, C or functional models of ... level experience in Networking, Video, or Storage Appliances. Strong understanding... more |
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| Mar 09 | Principal IC Design Engineer | Broadcom | San Jose, CA |
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and implementing testplans, developing Vera/SystemVerilog tests and checkers, creating ... have an advanced degree (MS or PhD) in EE or equivalent - Understanding ethernet... more |
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| Mar 09 | Verification Engineer | Staffing Tree Technology | Austin, TX |
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Austin, TX or Boxborough, MADuration: 9 months ContractKEY JOB FUNCTIONS: ... test benches in OVM, SystemVerilog and/or C++, applying pseudo-random test... more |
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| Mar 09 | Verification Engineer | Halcyon Solutions | Austin, TX |
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processors Developing test benches in OVM, SystemVerilog and/or C++, applying ... pseudo-random test generators, developing System Verilog/C/assembly tests, analyzing... more |
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| Mar 09 | Verification Engineer | Techno Soft | Austin, TX |
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processors Developing test benches in OVM, SystemVerilog and/or C++, applying ... pseudo-random test generators, developing System Verilog/C/assembly tests, analyzing... more |
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| Mar 09 | FPGA Design Engineer Consultant Contractor | Intevac | Santa Clara, CA |
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Verilog/System Verilog Assertions based verification. Ability to work sometimes i Required Experience Tools : Knowledge of Verilog is a must. Excellence in Altera Quartus II tool,... more |
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