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Job Search
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Requisition Number :
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07-07925
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Job Title :
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Intern, Engineering
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Job Category :
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University Relations - 2007
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Position Type :
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Internship - 2007
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Shift :
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1st shift - Day
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Candidate Type :
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Part Time Employee - Intern
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Percent of Travel Required :
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None
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Description :
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Requirements:
- looking for a strong candidate in CE/EE/CS
- strength in digital logic design, verification. knowledge of HDL such as Verilog a plus
- proficient with C language, programming structures and algorithms
- knowledge of Ethernet, ISO OSI layers a plus
- Grade 90% or higher
Job description:
- a successful candidate will assist the developement of Ethernet switching ASICs in the area of logic design and verification of -- packet processing pipelines; packet switching circuits; memory management units; medium access and host access control -- in an environment involving VERA, Verilog and C. Expsoure to technolgies including and not limited to IEEE 802.1 and IEEE 802.3 protocols, PCI, DDR, XAUI/PHY, SRAM/TCAM technologies
- location is San Jose, California
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Job Requirements :
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Requirements:
- looking for a strong candidate in CE/EE/CS
- strength in digital logic design, verification. knowledge of HDL such as Verilog a plus
- proficient with C language, programming structures and algorithms
- knowledge of Ethernet, ISO OSI layers a plus
- Grade 90% or higher
Job description:
- a successful candidate will assist the developement of Ethernet switching ASICs in the area of logic design and verification of -- packet processing pipelines; packet switching circuits; memory management units; medium access and host access control -- in an environment involving VERA, Verilog and C. Expsoure to technolgies including and not limited to IEEE 802.1 and IEEE 802.3 protocols, PCI, DDR, XAUI/PHY, SRAM/TCAM technologies
- location is San Jose, California
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City :
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San Jose
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State :
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California
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Country :
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United States
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