Job Description:

Senior ASIC Design Eng/Team Lead

Minimum Requirements:

• Looking for Senior or Lead ASIC / Logic Design engineers with backgrounds in Imaging, Video, Graphics, Microprocessor Design, or Multimedia ASIC design.
• 7 years demonstrated hands-on ASIC design
• Experience with Cadence tool suite desirable and FPGA related tools.
• Proficient in C
• Ideal candidate must possess good communication skills and the ability to work well as a team.
• BS in Electrical Engineering, MS preferred.

Job Description:

• ASIC Design in one of the following area: SOC implementation with memory subsystem, image signal processing, video compression
• Micro architecture definition; working closely with algorithm team for ASIC implementation
• Verilog, Logic simulations, synthesis, timing closure and ASIC sign-off.
• Drive debugging in the lab at chip/board (including FPGA) level
• Drive test bench for design verification and manufacturing test
• Interfacing with software/algorithm/system personnel in support of software and ASIC diagnostics development.