Role/Responsibility
Reporting to the Director of Hardware Engineering, the Principal level FPGA Design Engineer will be responsible for the development and implementation of FPGA designs for Mintera’s products. The successful candidate will have a key role in ensuring the success of current and future products. She/he must be customer-driven, solutions-focused and have a deep understanding of telecommunication transport equipment design and design for manufacturability.
Qualifications:
Required Skills and Experience
• Creates cost-effective, compact, efficient and reliable FPGA designs
• Works with the HW & SW teams to define requirements and provide FPGA design and interface specifications
• Performs Verilog coding, simulations, and synthesis tasks
• Creates test platforms for chip level and board level verification
• Responsible for the initial lab debug and bring-up of FPGA and board/system level hardware designs
• Experience with Xilinx or Altera FPGAs
• Thorough understanding of synthesis, simulation, & other industry standard EDA tools
• Knowledge of DWDM, OTN, SONET/SDH, Ethernet networking
• BSEE or equivalent and 8+ years experience working in either the telecommunications or optical transmission arena. MSEE is preferred
• Candidates should have a successful track record of product design from concept through manufacture
Mintera is a global technology leader enabling migration to high bit-rate optical transport in metro, regional, long-haul, and ultra long-haul networks.
