Knowledge of digital logic design and computer architecture.
Work closely with design team to ensure timely delivery of quality designs.
Experience with expertise in developing testplans/testbenches, writing/debugging tests and industry standard interfaces.
Experience with advanced verification techniques such as CRV, VMM, formal and SVA a plus.
Should be a team player with excellent communication skills, be able to independently lead the verification efforts on a block/area of the design.


BS or MS with 3+ years of experience in verification of complex asics, processors or SOCs. Proficient with SystemVerilog/Verilog/Vera/C/C++/Perl

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